Z8F4822AR020SG Datasheet, PDF (206/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
186
• Voltage Brown-Out reset
• Asserting the RESET pin Low to initiate a Reset
• Driving the DBG pin Low while the device is in STOP Mode initiates a system reset
OCD Data Format
The OCD interface uses the asynchronous data format defined for RS-232. Each character
is transmitted as 1 start bit, 8 data bits (least significant bit first), and 1 stop bit, as shown
in Figure 39.
START
D0
D1
D2
D3
D4
D5
D6
D7 STOP
Figure 39. OCD Data Format
OCD Autobaud Detector/Generator
To run over a range of baud rates (bits per second) with various system clock frequencies,
the On-Chip Debugger has an Autobaud Detector/Generator. After a reset, the OCD is idle
until it receives data. The OCD requires that the first character sent from the host is the
character 80H. The character 80H has eight continuous bits Low (one start bit plus 7 data
bits). The Autobaud Detector measures this period and sets the OCD Baud Rate Generator
accordingly.
The Autobaud Detector/Generator is clocked by the system clock. The minimum baud rate
is the system clock frequency divided by 512. For optimal operation, the maximum rec-
ommended baud rate is the system clock frequency divided by 8. The theoretical maxi-
mum baud rate is the system clock frequency divided by 4. This theoretical maximum is
possible for low noise designs with clean signals. Table 101 lists minimum and recom-
mended maximum baud rates for sample crystal frequencies.
Table 101. OCD Baud-Rate Limits
System Clock
Frequency (MHz)
20.0
1.0
0.032768 (32 kHz)
Recommended
Maximum Baud Rate
(kbits/s)
2500
125.0
4.096
Minimum Baud Rate
(kbits/s)
39.1
1.96
0.064
PS019924-0113
PRELIMINARY
Operation