Z8F4822AR020SG Datasheet, PDF (213/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
193
On-Chip Debugger Control Register Definitions
This section describes the features of the On-Chip Debugger Control and Status registers.
OCD Control Register
The OCD Control Register, shown in Table 103, controls the state of the On-Chip Debug-
ger. This register enters or exits DEBUG Mode and enables the BRK instruction.
A reset and stop function can be achieved by writing 81H to this register. A reset and go
function can be achieved by writing 41H to this register. If the device is operating in
DEBUG Mode, a run function can be implemented by writing 40H to this register.
Table 103. OCD Control Register (OCDCTL)
Bit
7
6
5
4
3
2
1
Field
DBGMODE BRKEN DBGACK BRKLOOP
Reserved
RESET
0
R/W
R/W
R
0
RST
R/W
Bit
Description
[7]
DBGMODE
DEBUG Mode
Setting this bit to 1 causes the device to enter DEBUG Mode. When in DEBUG Mode, the
eZ8 CPU stops fetching new instructions. Clearing this bit causes the eZ8 CPU to start run-
ning again. This bit is automatically set when a BRK instruction is decoded and breakpoints
are enabled. If the Read Protect option bit is enabled, this bit can only be cleared by reset-
ting the device, it cannot be written to 0.
0 = TheZ8 Encore! XP F64xx Series device is operating in NORMAL Mode.
1 = The Z8 Encore! XP F64xx Series device is in DEBUG Mode.
[6]
BRKEN
Breakpoint Enable
This bit controls the behavior of the BRK instruction (op code 00H). By default, breakpoints
are disabled and the BRK instruction behaves like a NOP. If this bit is set to 1 and a BRK
instruction is decoded, the OCD takes action dependent upon the BRKLOOP bit.
0 = BRK instruction is disabled.
1 = BRK instruction is enabled.
[5]
DBGACK
Debug Acknowledge
This bit enables the debug acknowledge feature. If this bit is set to 1, then the OCD sends
an Debug Acknowledge character (FFH) to the host when a breakpoint occurs.
0 = Debug Acknowledge is disabled.
1 = Debug Acknowledge is enabled.
PS019924-0113
PRELIMINARY
On-Chip Debugger Control Register