Z8F4822AR020SG Datasheet, PDF (191/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
171
Table 92. Z8 Encore! XP F64xx Series Information Area Map
Flash Memory
Address (Hex)
FE00H–FE3FH
FE40H–FE53H
FE54H–FFFFH
Function
Reserved
Part Number
20-character ASCII alphanumeric code
Left-justified and filled with zeros
Reserved
Operation
The Flash Controller provides the proper signals and timing for the Byte Programming,
Page Erase, and Mass Erase operations within Flash memory. The Flash Controller con-
tains a protection mechanism, via the Flash Control Register (FCTL), to prevent acciden-
tal programming or erasure. The following subsections provide details about the Lock,
Unlock, Sector Protect, Byte Programming, Page Erase and Mass Erase operations.
Timing Using the Flash Frequency Registers
Before performing a program or erase operation in Flash memory, you must first configure
the Flash Frequency High and Low Byte registers. The Flash Frequency registers allow
programming and erasure of the Flash with system clock frequencies ranging from 20 kHz
through 20 MHz (the valid range is limited to the device operating frequencies).
The Flash Frequency High and Low Byte registers combine to form a 16-bit value,
FFREQ, to control timing for Flash program and erase operations. The 16-bit Flash Fre-
quency value must contain the system clock frequency in kHz. This value is calculated
using the following equation:.
FFREQ[15:0]
=
S----y---s--t--e---m------C----l-o---c---k-----F---r--e---q---u---e--n---c---y-----(--H----z---)
1000
Caution: Flash programming and erasure are not supported for system clock frequencies below
20 kHz, above 20 MHz, or outside of the devices’ operating frequency range. The Flash
Frequency High and Low Byte registers must be loaded with the correct value to ensure
proper Flash programming and erase operations.
PS019924-0113
PRELIMINARY
Operation