Z8F4822AR020SG Datasheet, PDF (261/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
241
Table 136. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
Symbolic Operation
Address
Mode
dst src
SRA dst
R
SRL dst
SRP src
D7 D6 D5 D4 D3 D2 D1 D0
dst
C _IR
0
D7 D6 D5 D4 D3 D2 D1 D0
C
R
dst
IR
RP ← src
IM
STOP
STOP Mode
SUB dst, src dst ← dst – src
r
r
r Ir
RR
R IR
R IM
SUBX dst, src dst ← dst – src
IR IM
ER ER
ER IM
SWAP dst
dst[7:4]  dst[3:0]
R
IR
TCM dst, src (NOT dst) AND src
r
r
r Ir
RR
R IR
R IM
IR IM
TCMX dst, src (NOT dst) AND src
ER ER
ER IM
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
Opcode(s)
Flags
Fetch Instr.
(Hex) C Z S V D H Cycles Cycles
D0
* * *0–– 2
2
D1
2
3
1F C0 * * 0 * – – 3
2
1F C1
3
3
01
–––––– 2
2
6F
–––––– 1
2
22
****1* 2
3
23
2
4
24
3
3
25
3
4
26
3
3
27
3
4
28
****1* 4
3
29
4
3
F0
X* *X–– 2
2
F1
2
3
62
–* *0–– 2
3
63
2
4
64
3
3
65
3
4
66
3
3
67
3
4
68
–* *0–– 4
3
69
4
3
PS019924-0113
PRELIMINARY
eZ8 CPU Instruction Summary