Z8F4822AR020SG Datasheet, PDF (57/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
37
Architecture
Figure 10 displays a simplified block diagram of a GPIO port pin. In this figure, the ability
to accommodate alternate functions and variable port current drive strength are not illus-
trated.
Port Input
Data Register
QD
Schmitt-Trigger
Port Output
Data Register
DATA
Bus
DQ
System
Clock
System
Clock
Port Output Control
V_DD
Port
Pin
Port Data Direction
Figure 10. GPIO Port Pin Block Diagram
GND
GPIO Alternate Functions
Many of the GPIO port pins can be used as both general-purpose I/O and to provide access
to on-chip peripheral functions such as the timers and serial communication devices. The
Port A–H Alternate Function subregisters configure these pins for either general-purpose
I/O or alternate function operation. When a pin is configured for alternate function, control
of the port pin direction (input/output) is passed from the Port A–H Data Direction regis-
ters to the alternate function assigned to this pin. Table 12 lists the alternate functions
associated with each port pin.
PS019924-0113
PRELIMINARY
Architecture