Z8F4822AR020SG Datasheet, PDF (91/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
71
Every subsequent appropriate transition (after the first) of the timer input signal captures
the current count value. The Capture value is written to the Timer PWM High and Low
Byte Registers. When the capture event occurs, an interrupt is generated, the count value
in the Timer High and Low Byte registers is reset to 0001H, and counting resumes.
If no capture event occurs, the timer counts up to the 16-bit compare value stored in the
Timer Reload High and Low Byte registers. Upon reaching the compare value, the timer
generates an interrupt, the count value in the Timer High and Low Byte registers is reset to
0001H and counting resumes.
Observe the following procedure for configuring a timer for CAPTURE/COMPARE
Mode and initiating the count:
1. Write to the Timer Control 1 Register to:
– Disable the timer
– Configure the timer for CAPTURE/COMPARE Mode
– Set the prescale value
– Set the Capture edge (rising or falling) for the timer input
2. Write to the Timer High and Low Byte registers to set the starting count value (typi-
cally 0001H).
3. Write to the Timer Reload High and Low Byte registers to set the compare value.
4. If appropriate, enable the timer interrupt and set the timer interrupt priority by writing
to the relevant interrupt registers.
5. Configure the associated GPIO port pin for the timer input alternate function.
6. Write to the Timer Control 1 Register to enable the timer.
7. Counting begins on the first appropriate transition of the timer input signal. No inter-
rupt is generated by this first edge.
In COMPARE Mode, the elapsed time from timer start to capture event can be calculated
using the following equation:
Capture Elapsed Time (s)
=
_{---C----a---p---t-u---r--e----V-----a--l--u---e----–-----S---t--a---r--t---V----a---l-u---e----}_---_{-----P---r--e---s--c---a---l-e-}
System Clock Frequency (Hz)
Reading the Timer Count Values
The current count value in the timers can be read while counting (enabled). This capability
has no effect on timer operation. When the timer is enabled and the Timer High Byte Reg-
ister is read, the contents of the Timer Low Byte Register are placed in a holding register.
A subsequent read from the Timer Low Byte Register returns the value in the holding reg-
PS019924-0113
PRELIMINARY
Operation