Z8F4822AR020SG Datasheet, PDF (161/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
141
If the slave were to Not Acknowledge at this point (this should not happen because the
slave did acknowledge the first two address bytes), software would respond by setting
the stop and flush bits and clearing the TXI bit. The I²C Controller sends the stop con-
dition on the bus and clears the stop and NCKI bits. The transaction is complete
(ignore the following steps).
19. The I²C Controller shifts in a byte of data from the I²C slave on the SDA signal. The
I²C Controller sends a Not Acknowledge to the I²C slave if the NAK bit is set (last
byte), else it sends an Acknowledge.
20. The I²C Controller asserts the receive interrupt (RDRF bit set in the Status Register).
21. Software responds by reading the I²C Data Register which clears the RDRF bit. If
there is only one more byte to receive, set the NAK bit of the I²C Control Register.
22. If there are one or more bytes to transfer, return to Step 19.
23. After the last byte is shifted in, a Not Acknowledge interrupt is generated by the I²C
Controller.
24. Software responds by setting the stop bit of the I²C Control Register.
25. A stop condition is sent to the I²C slave and the stop and NCKI bits are cleared.
I²C Control Register Definitions
This section defines the features of the following I²C Control registers.
I2C Data Register: see page 141
I2C Status Register: see page 142
I2C Control Register: see page 144
I2C Baud Rate High and Low Byte Registers: see page 145
I2C Diagnostic State Register: see page 147
I2C Diagnostic Control Register: see page 149
I²C Data Register
The I²C Data Register, shown in Table 71, holds the data that is to be loaded into the I²C
Shift Register during a write to a slave. This register also holds data that is loaded from the
I²C Shift Register during a read from a slave. The I²C Shift Register is not accessible in
the Register File address space, but is used only to buffer incoming and outgoing data.
PS019924-0113
PRELIMINARY
I2C Control Register Definitions