Z8F4822AR020SG Datasheet, PDF (104/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
84
Table 48. Watchdog Timer Control Register (WDTCTL)
Bit
7
6
5
4
3
2
1
0
Field
POR
STOP
WDT
EXT
Reserved
SM
RESET
See Table 49.
0
R/W
R
Address
FF0H
Bit
[7]
POR
[6]
STOP
[5]
WDT
[4]
EXT
[3:1]
[0]
SM
Description
Power-On Reset Indicator
If this bit is set to 1, a Power-On Reset event occurred. This bit is reset to 0 if a WDT time-out
or Stop Mode Recovery occurs. This bit is also reset to 0 when the register is read.
Stop Mode Recovery Indicator
If this bit is set to 1, a Stop Mode Recovery occurred. If the stop and WDT bits are both set to
1, the Stop Mode Recovery occurred due to a WDT time-out. If the stop bit is 1 and the WDT
bit is 0, the Stop Mode Recovery was not caused by a WDT time-out. This bit is reset by a
Power-On Reset or a WDT time-out that occurred while not in STOP Mode. Reading this regis-
ter also resets this bit.
Watchdog Timer Time-Out Indicator
If this bit is set to 1, a WDT time-out occurred. A Power-On Reset resets this pin. A Stop Mode
Recovery from a change in an input pin also resets this bit. Reading this register resets this bit.
External Reset Indicator
If this bit is set to 1, a Reset initiated by the external RESET pin occurred. A Power-On Reset
or a Stop Mode Recovery from a change in an input pin resets this bit. Reading this register
resets this bit.
Reserved
These bits are reserved and must be programmed to 000.
STOP Mode Configuration Indicator
0 = Watchdog Timer and its internal RC oscillator will continue to operate in STOP Mode.
1 = Watchdog Timer and its internal RC oscillator will be disabled in STOP Mode.
PS019924-0113
PRELIMINARY
Watchdog Timer Control Register