Z8F4822AR020SG Datasheet, PDF (113/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
93
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine performs the follow-
ing functions:
1. Check the UART Status 0 Register to determine the source of the interrupt: error,
break, or received data.
2. If the interrupt was caused by data available, read the data from the UART Receive
Data Register. If operating in MULTIPROCESSOR (9-Bit) Mode, further actions may
be required depending on the MULTIPROCESSOR Mode bits MPMD[1:0].
3. Clear the UART Receiver interrupt in the applicable Interrupt Request Register.
4. Execute the IRET instruction to return from the interrupt service routine and await
more data.
Clear To Send (CTS) Operation
The CTS pin, if enabled by the CTSE bit of the UART Control 0 Register, performs flow
control on the outgoing transmit datastream. The Clear To Send (CTS) input pin is sam-
pled one system clock before beginning any new character transmission. To delay trans-
mission of the next data character, an external receiver must deassert CTS at least one
system clock cycle before a new data transmission begins. For multiple character trans-
missions, this would typically be done during stop bit transmission. If CTS deasserts in the
middle of a character transmission, the current character is sent completely.
MULTIPROCESSOR (9-bit) Mode
The UART has a MULTIPROCESSOR (9-Bit) Mode that uses an extra (9th) bit for selec-
tive communication when a number of processors share a common UART bus. In MULTI-
PROCESSOR Mode (also referred to as 9-Bit mode), the multiprocessor bit (MP) is
transmitted immediately following the 8 bits of data and immediately preceding the stop
bit(s); the character format is displayed in Figure 16.
Idle State
of Line
lsb
1
Data Field
msb
Start Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 MP
0
Stop Bit(s)
1
2
Figure 16. UART Asynchronous MULTIPROCESSOR Mode Data Format
PS019924-0113
PRELIMINARY
Operation