Z8F4822AR020SG Datasheet, PDF (248/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
228
Table 125. Notational Shorthand (Continued)
Notation Description
RA
Relative Address
rr
Working Register Pair
RR
Register Pair
Vector Vector Address
X
Indexed
Operand Range
X
X represents an index in the range of +127 to –128
which is an offset relative to the address of the next
instruction.
RRp
p = 0, 2, 4, 6, 8, 10, 12, or 14.
Reg
Reg. represents an even number in the range of 00H
to FEH.
Vector Vector represents a number in the range of 00H to
FFH.
#Index
The register or register pair to be indexed is offset by
the signed Index value (#Index) in a +127 to –128
range.
Table 126 contains additional symbols that are used throughout the Instruction Summary
and Instruction Set Description sections.
Table 126. Additional Symbols
Symbol
dst
src
@
SP
PC
FLAGS
RP
#
B
%
H
Definition
Destination Operand
Source Operand
Indirect Address Prefix
Stack Pointer
Program Counter
Flags Register
Register Pointer
Immediate Operand Prefix
Binary Number Suffix
Hexadecimal Number Prefix
Hexadecimal Number Suffix
Assignment of a value is indicated by an arrow, as shown in the following example.
dst ← dst + src
This example indicates that the source data is added to the destination data; the result is
stored in the destination location.
PS019924-0113
PRELIMINARY
eZ8 CPU Instruction Notation