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Z8F4822AR020SG Datasheet, PDF (171/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers
Z8 Encore! XP® F64xx Series
Product Specification
151
2. Determine the 12-bit Start and End Register File addresses. The 12-bit Start Address
is provided by {DMAx_H[3:0], DMA_START[7:0]}. The 12-bit End Address is pro-
vided by {DMAx_H[7:4], DMA_END[7:0]}.
3. Write the Start and End Register File address high nibbles to the DMAx End/Start
Address High Nibble Register.
4. Write the lower byte of the Start Address to the DMAx Start/Current Address Register.
5. Write the lower byte of the End Address to the DMAx End Address Register.
6. Write to the DMAx Control Register to complete the following operations:
– Select loop or single-pass mode operation
– Select the data transfer direction (either from the Register File RAM to the on-
chip peripheral control register; or from the on-chip peripheral control register to
the Register File RAM)
– Enable the DMAx interrupt request, if appropriate
– Select Word or Byte mode
– Select the DMAx request trigger
– Enable the DMAx channel
DMA_ADC Operation
DMA_ADC transfers data from the ADC to the Register File. The sequence of operations
in a DMA_ADC data transfer is:
1. ADC completes conversion on the current ADC input channel and signals the DMA
controller that two-bytes of ADC data are ready for transfer.
2. DMA_ADC requests control of the system bus (address and data) from the eZ8 CPU.
3. After the eZ8 CPU acknowledges the bus request, DMA_ADC transfers the two-byte
ADC output value to the Register File and then returns system bus control back to the
eZ8 CPU.
4. If the current ADC analog input is the highest-numbered input to be converted:
– The DMA_ADC resets the ADC analog input number to 0 and initiates data con-
version on ADC analog input 0
– If configured to generate an interrupt, the DMA_ADC sends an interrupt request
to the Interrupt Controller
If the current ADC analog input is not the highest-numbered input to be converted,
then the DMA_ADC initiates data conversion in the next higher-numbered ADC
analog input.
PS019924-0113
PRELIMINARY
Operation