Z8F4822AR020SG Datasheet, PDF (258/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
238
Table 136. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic
LD dst, rc
Symbolic Operation
dst ← src
Address
Mode
dst src
r IM
r X(r)
X(r) r
r Ir
RR
R IR
R IM
IR IM
Ir r
LDC dst, src dst ← src
IR R
r Irr
Ir Irr
LDCI dst, src
LDE dst, src
dst ← src
r ← r + 1
rr ← rr + 1
dst ← src
Irr r
Ir Irr
Irr Ir
r Irr
LDEI dst, src
dst ← src
r ← r + 1
rr ← rr + 1
LDWX dst, src dst ← src
Irr r
Ir Irr
Irr Ir
ER ER
Note: Flags Notation:
* = Value is a function of the result of the operation.
– = Unaffected.
X = Undefined.
0 = Reset to 0.
1 = Set to 1.
Opcode(s)
Flags
Fetch Instr.
(Hex) C Z S V D H Cycles Cycles
0C–FC – – – – – – 2
2
C7
3
3
D7
3
4
E3
2
3
E4
3
2
E5
3
4
E6
3
2
E7
3
3
F3
2
3
F5
3
3
C2
–––––– 2
5
C5
2
9
D2
2
5
C3
–––––– 2
9
D3
2
9
82
–––––– 2
5
92
2
5
83
–––––– 2
9
93
2
9
1F E8 – – – – – – 5
4
PS019924-0113
PRELIMINARY
eZ8 CPU Instruction Summary