Z8F4822AR020SG Datasheet, PDF (53/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
33
Table 10. Stop Mode Recovery Sources and Resulting Action
Operating Mode
STOP Mode
Stop Mode Recovery Source
Action
Watchdog Timer time-out when configured Stop Mode Recovery.
for Reset.
Watchdog Timer time-out when configured Stop Mode Recovery followed by
for interrupt.
interrupt (if interrupts are enabled).
Data transition on any GPIO port pin enabled Stop Mode Recovery.
as a Stop Mode Recovery source.
Stop Mode Recovery Using Watchdog Timer Time-Out
If the Watchdog Timer times out during STOP Mode, the device undergoes a Stop Mode
Recovery sequence. In the Watchdog Timer Control Register, the WDT and stop bits are
set to 1. If the Watchdog Timer is configured to generate an interrupt upon time-out and
the Z8 Encore! XP F64xx Series devices are configured to respond to interrupts, the eZ8
CPU services the Watchdog Timer interrupt request following the normal Stop Mode
Recovery sequence.
Stop Mode Recovery Using a GPIO Port Pin Transition HALT
Each of the GPIO port pins may be configured as a Stop Mode Recovery input source. On
any GPIO pin enabled as a Stop Mode Recovery source, a change in the input pin value
(from High to Low or from Low to High) initiates Stop Mode Recovery. The GPIO Stop
Mode Recovery signals are filtered to reject pulses less than 10 ns (typical) in duration. In
the Watchdog Timer Control Register, the stop bit is set to 1.
Caution: In STOP Mode, the GPIO Port Input Data registers (PxIN) are disabled. The Port Input
Data registers record the Port transition only if the signal stays on the Port pin through
the end of the Stop Mode Recovery delay. Thus, short pulses on the Port pin can initiate
Stop Mode Recovery without being written to the Port Input Data Register or without ini-
tiating an interrupt (if enabled for that pin).
PS019924-0113
PRELIMINARY
Stop Mode Recovery