Z8F4822AR020SG Datasheet, PDF (63/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
43
Port A–H Output Control Subregisters
The Port A–H Output Control Subregister, shown in Table 18, is accessed through the Port
A–H Control Register by writing 03H to the Port A–H Address Register. Setting the bits in
the Port A–H Output Control subregisters to 1 configures the specified port pins for open-
drain operation. These subregisters affect the pins directly and, as a result, alternate func-
tions are also affected.
Table 18. Port A–H Output Control Subregisters
Bit
7
6
5
4
3
2
1
0
Field
POC7 POC6 POC5 POC4 POC3 POC2 POC1 POC0
RESET
0
R/W
R/W
Address
See note.
Note: If a 03H exists in the Port A–H Address Register, it is accessible through the Port A–H Control Register.
Bit
Description
[7:0]
POCx
Port Output Control
These bits function independently of the alternate function bit and disables the drains if set to 1.
0 = The drains are enabled for any output mode.
1 = The drain of the associated pin is disabled (open-drain mode).
Note: x indicates register bits in the range [7:0].
PS019924-0113
PRELIMINARY
GPIO Control Register Definitions