Z8F4822AR020SG Datasheet, PDF (158/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
138
clears the stop and NCKI bits. The transaction is complete (ignore the following
steps).
17. The I²C Controller shifts the data out by the SDA signal. After the first bit is sent, the
transmit interrupt is asserted.
18. If more bytes remain to be sent, return to Step 14.
19. If the last byte is currently being sent, software sets the stop bit of the I²C Control
Register (or start bit to initiate a new transaction). In the stop case, software also clears
the TXI bit of the I²C Control Register at the same time.
20. The I²C Controller completes transmission of the last data byte on the SDA signal.
21. The slave may either Acknowledge or Not Acknowledge the last byte. Because either
the stop or start bit is already set, the NCKI interrupt does not occur.
22. The I²C Controller sends the stop (or RESTART) condition to the I²C bus and clears
the stop (or start) bit.
Read Transaction with a 7-Bit Address
Figure 32 displays the data transfer format for a read operation to a 7-bit addressed slave.
The shaded regions indicate data transferred from the I²C Controller to slaves and
unshaded regions indicate data transferred from the slaves to the I²C Controller.
S Slave Address
R = 1 A Data A Data A P/S
Figure 32. Receive Data Transfer Format for a 7-Bit Addressed Slave
Observe the following procedure for a read operation to a 7-bit addressed slave:
1. Software writes the I²C Data Register with a 7-bit slave address plus the read bit (=1).
2. Software asserts the start bit of the I²C Control Register.
3. If this is a single byte transfer, Software asserts the NAK bit of the I²C Control Regis-
ter so that after the first byte of data has been read by the I²C Controller, a Not
Acknowledge is sent to the I²C slave.
4. The I²C Controller sends the start condition.
5. The I²C Controller shifts the address and read bit out the SDA signal.
6. If the I²C slave acknowledges the address by pulling the SDA signal Low during the
next High period of SCL, the I²C Controller sets the ACK bit in the I²C Status Regis-
ter. Continue with Step 7.

If the slave does not acknowledge, the Not Acknowledge interrupt occurs (NCKI bit is
PS019924-0113
PRELIMINARY
Operation