Z8F4822AR020SG Datasheet, PDF (60/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
40
Port A–H Address Registers
The Port A–H Address registers, shown in Table 14, select the GPIO port functionality
accessible through the Port A–H Control registers. The Port A–H Address and Control
registers combine to provide access to all GPIO port control.
Table 14. Port A–H GPIO Address Registers (PxADDR)
Bit
7
6
5
4
3
2
1
0
Field
PADDR[7:0]
RESET
00H
R/W
R/W
Address
FD0H, FD4H, FD8H, FDCH, FE0H, FE4H, FE8H, FECH
Bit
[7:0]
PADDR
Description
Port Address
This port address selects one of the subregisters accessible through the Port A–H Control
Registers.
00H = No function. Provides some protection against accidental port reconfiguration.
01H = Data Direction.
02H = Alternate Function.
03H = Output Control (Open-Drain).
04H = High Drive Enable.
05H = Stop Mode Recovery Source Enable.
06H–FFH = No function.
PS019924-0113
PRELIMINARY
GPIO Control Register Definitions