Z8F4822AR020SG Datasheet, PDF (198/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
178
Table 95. Page Select Register (FPS)
Bit
7
6
5
4
3
2
1
0
Field
INFO_EN
PAGE
RESET
0
R/W
R/W
Address
FF9H
Bit
[7]
INFO_EN
[6:0]
PAGE
Description
Information Area Enable
0 = Information Area is not selected.
1 = Information Area is selected. The Information area is mapped into the Flash memory
address space at addresses FE00H through FFFFH.
Page Select
This 7-bit field selects the Flash memory page for programming and Page Erase operations.
Flash Memory Address[15:9] = PAGE[6:0].
Flash Sector Protect Register
The Flash Sector Protect Register, shown in Table 96, protects Flash memory sectors from
being programmed or erased from user code. The Flash Sector Protect Register shares its
Register File address with the Page Select Register. The Flash Sector Protect Register can
be accessed only after writing the Flash Control Register with 5EH.
User code can only write bits in this register to 1 (bits cannot be cleared to 0 by user code).
To determine the appropriate Flash memory sector address range and sector number for
your Z8F64xx Series product, please refer to Table 91 on page 169.
Table 96. Flash Sector Protect Register (FPROT)
Bit
7
6
5
4
3
2
1
Field
SECT7 SECT6 SECT5 SECT4 SECT3 SECT2 SECT1
RESET
0
R/W
R/W*
Address
FF9H
Note: *R/W = This register is accessible for read operations; it can be written to 1 only via user code.
0
SECT0
Bit
Description
[7:0]
SECTn
Sector Protect**
0 = Sector n can be programmed or erased from user code.
1 = Sector n is protected and cannot be programmed or erased from user code.
Note: **User code can only write bits from 0 to 1.
PS019924-0113
PRELIMINARY
Flash Control Register Definitions