Z8F4822AR020SG Datasheet, PDF (188/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
168
ADC Data Low Bits Register
The ADC Data Low Bits Register, Table 89, contains the lower two bits of the conversion
value. The data in the ADC Data Low Bits Register is latched each time the ADC Data
High Byte Register is read. Reading this register always returns the lower two bits of the
conversion last read into the ADC High Byte Register. Access to the ADC Data Low Bits
Register is read-only. The full 10-bit ADC result is provided by {ADCD_H[7:0],
ADCD_L[7:6]}.
Table 89. ADC Data Low Bits Register (ADCD_L)
Bit
7
6
5
4
3
2
1
0
Field
ADCD_L
Reserved
RESET
X
R/W
R
Address
F73H
Bit
Description
[7:6]
ADC Data Low Bits
ADCD_L These are the least significant two bits of the 10-bit ADC output. These bits are undefined after
a Reset.
[5:0]
Reserved
These bits are reserved and are always undefined.
PS019924-0113
PRELIMINARY
ADC Control Register Definitions