Z8F4822AR020SG Datasheet, PDF (176/323 Pages) Zilog, Inc. – High Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F64xx Series
Product Specification
156
DMAx Start/Current Address Low Byte Register
The DMAx Start/Current Address Low Byte Register, shown in Table 81, in conjunction
with the DMAx Address High Nibble Register, shown in Table 80, forms a 12-bit Start/
Current Address. Writes to this register set the Start Address for DMA operations. Each
time the DMA completes a data transfer, the 12-bit Start/Current Address increments by
either 1 (single-byte transfer) or 2 (two-byte word transfer). Reads from this register return
the low byte of the current address to be used for the next DMA data transfer.
Table 81. DMAx Start/Current Address Low Byte Register (DMAxSTART)
Bit
7
6
5
4
3
2
1
0
Field
DMA_START
RESET
X
R/W
R/W
Address
FB3H, FBBH
Bit
[7:0]
DMA_START
Description
DMAx Start/Current Address Low
These bits, with the four lower bits of the DMAx_H Register, form the 12-bit Start/Current
address. The full 12-bit address is provided by {DMA_START_H[3:0], DMA_START[7:0]}.
DMAx End Address Low Byte Register
The DMAx End Address Low Byte Register, shown in Table 82, forms a 12-bit End
Address.
Table 82. DMAx End Address Low Byte Register (DMAxEND)
Bit
7
6
5
4
3
2
1
0
Field
DMA_END
RESET
X
R/W
R/W
Address
FB4H, FBCH
Bit
[7]
DMA_END
Description
DMAx End Address Low
These bits, with the four upper bits of the DMAx_H Register, form a 12-bit address. This
address is the ending location of the DMAx transfer. The full 12-bit address is provided by
{DMA_END_H[3:0], DMA_END[7:0]}.
PS019924-0113
PRELIMINARY
DMA Control Register Definitions