MC9S12GRMV1 Datasheet, PDF (745/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Timer Module (TIM16B6CV3)
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Table 22-16. PTPSR Field Descriptions
Field
Description
7:0
PTPS[7:0]
Precision Timer Prescaler Select Bits — These eight bits specify the division rate of the main Timer prescaler.
These are effective only when the PRNT bit of TSCR1 is set to 1. Table 22-17 shows some selection examples
in this case.
The newly selected prescale factor will not take effect until the next synchronized edge where all prescale counter
stages equal zero.
The Prescaler can be calculated as follows depending on logical value of the PTPS[7:0] and PRNT bit:
PRNT = 1 : Prescaler = PTPS[7:0] + 1
PTPS7
0
0
0
0
-
-
-
0
0
0
-
-
-
1
1
1
1
Table 22-17. Precision Timer Prescaler Selection Examples when PRNT = 1
PTPS6
0
0
0
0
-
-
-
0
0
0
-
-
-
1
1
1
1
PTPS5
0
0
0
0
-
-
-
0
0
0
-
-
-
1
1
1
1
PTPS4
0
0
0
0
-
-
-
1
1
1
-
-
-
1
1
1
1
PTPS3
0
0
0
0
-
-
-
0
0
0
-
-
-
1
1
1
1
PTPS2
0
0
0
0
-
-
-
0
1
1
-
-
-
1
1
1
1
PTPS1
0
0
1
1
-
-
-
1
0
0
-
-
-
0
0
1
1
PTPS0
0
1
0
1
-
-
-
1
0
1
-
-
-
0
1
0
1
Prescale
Factor
1
2
3
4
-
-
-
20
21
22
-
-
-
253
254
255
256
22.4 Functional Description
This section provides a complete functional description of the timer TIM16B6CV3 block. Please refer to
the detailed timer block diagram in Figure 22-22 as necessary.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
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