MC9S12GRMV1 Datasheet, PDF (234/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Table 2-70. DDRJ Register Field Descriptions
Field
7-0
DDRJ
Description
Port J data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
2.4.3.45 Port J Pull Device Enable Register (PERJ)
Address 0x026C (G1, G2)
7
R
PERJ7
W
Reset
1
Address 0x026C (G3)
6
PERJ6
1
5
PERJ5
1
4
PERJ4
1
3
PERJ3
1
2
PERJ2
1
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
PERJ3
PERJ2
0
0
0
1
1
Figure 2-45. Port J Pull Device Enable Register (PERJ)
Access: User read/write¹
1
0
PERJ1
PERJ0
1
1
Access: User read/write¹
1
0
PERJ1
PERJ0
1
1
Table 2-71. PERJ Register Field Descriptions
Field
7-0
PERJ
Description
Port J pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
MC9S12G Family Reference Manual, Rev.1.23
236
Freescale Semiconductor