MC9S12GRMV1 Datasheet, PDF (248/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
2.5.2.3 Data Direction Register (DDRx)
This register defines whether the pin is used as an general-purpose input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored (Figure 2-64).
Independent of the pin usage with a peripheral module this register determines the source of data when
reading the associated data register address (2.5.2.1/2-249).
NOTE
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on port data or port input registers, when
changing the data direction register.
PTI
0
1
PT
0
1
PIN
DDR
0
1
data out
Module _{output enable}
module enable
Figure 2-64. Illustration of I/O pin functionality
2.5.2.4 Pull Device Enable Register (PERx)
This register turns on a pullup or pulldown device on the related pins determined by the associated polarity
select register (2.5.2.5/2-250).
The pull device becomes active only if the pin is used as an input or as a wired-or output. Some peripheral
module only allow certain configurations of pull devices to become active. Refer to Section 2.3, “PIM
Routing - Functional description”.
2.5.2.5 Pin Polarity Select Register (PPSx)
This register selects either a pullup or pulldown device if enabled.
It becomes only active if the pin is used as an input. A pullup device can be activated if the pin is used as
a wired-or output.
MC9S12G Family Reference Manual, Rev.1.23
250
Freescale Semiconductor