MC9S12GRMV1 Datasheet, PDF (237/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
2.4.3.49 Port AD Data Register (PT0AD)
Address 0x0270 (G1, G2)
7
R
PT0AD7
W
Reset
0
Address 0x0270 (G3)
6
PT0AD6
0
5
PT0AD5
0
4
PT0AD4
0
3
PT0AD3
0
2
PT0AD2
0
7
6
5
4
3
2
R
0
0
0
0
PT0AD3
PT0AD2
W
Reset
0
0
0
0
0
0
Figure 2-49. Port AD Data Register (PT0AD)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PT0AD1
PT0AD0
0
0
Access: User read/write¹
1
0
PT0AD1
PT0AD0
0
0
Table 2-75. PT0AD Register Field Descriptions
Field
Description
7-0
PT0AD
Port AD general-purpose input/output data—Data Register
When not used with an alternative signal, the associated pin can be used as general-purpose I/O. In
general-purpose output mode the port data register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read if the digital input buffers are enabled (Section 2.3.12, “Pins AD15-0”).
2.4.3.50 Port AD Data Register (PT1AD)
Address 0x0271
7
R
PT1AD7
W
6
PT1AD6
5
PT1AD5
4
PT1AD4
3
PT1AD3
2
PT1AD2
Reset
0
0
0
0
0
0
Figure 2-50. Port AD Data Register (PT1AD)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Access: User read/write¹
1
0
PT1AD1
PT1AD0
0
0
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
239