MC9S12GRMV1 Datasheet, PDF (1250/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Detailed Register Address Map
0x0020–0x002F Debug Module (DBG)
Address Name
Bit 7
0x0029
0x002A
0x002B
0x002C
0x002D
0x002E
0x002F
R
DBGXAH
W
R
DBGXAM
W
R
DBGXAL
W
R
DBGADH
W
R
DBGADL
W
R
DBGADHM
W
R
DBGADLM
W
0
Bit 15
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
Bit 6
0
14
6
14
6
14
6
Bit 5
0
13
5
13
5
13
5
0x0030–0x033 Reserved
Address Name
Bit 7
0x0030-
0x0033
R
Reserved
W
0
Bit 6
0
Bit 5
0
Bit 4
0
12
4
12
4
12
4
Bit 4
0
Bit 3
0
11
3
11
3
11
3
Bit 3
0
Bit 2
0
10
2
10
2
10
2
Bit 1
Bit 17
9
1
9
1
9
1
Bit 0
Bit 16
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 2
0
Bit 1
0
Bit 0
0
0x0034–0x003F Clock and Power Management (CPMU) Map 1 of 2
Address Name
Bit 7
Bit 6
0x0034
0x0035
0x0036
0x0037
0x0038
0x0039
0x003A
0x003B
0x003C
CPMU
SYNR
R
W
VCOFRQ[1:0]
CPMU R
REFDIV W
REFFRQ[1:0]
CPMU R
0
0
POSTDIV W
R
CPMUFLG
RTIF
W
PORF
R
0
CPMUINT
RTIE
W
R
CPMUCLKS
PLLSEL
W
PSTP
R
0
0
CPMUPLL
W
R
CPMURTI
RTDEC
W
RTR6
R
CPMUCOP
WCOP
W
RSBCK
Bit 5
0
0
LVRF
0
0
FM1
RTR5
0
WRTMASK
Bit 4
0
LOCKIF
LOCKIE
0
FM0
RTR4
0
Bit 3
Bit 2
SYNDIV[5:0]
Bit 1
Bit 0
REFDIV[3:0]
POSTDIV[4:0]
LOCK
ILAF
UPOSC
OSCIF
0
0
0
OSCIE
PRE
0
PCE
0
RTI
OSCSEL
0
COP
OSCSEL
0
RTR3
0
RTR2
CR2
RTR1
CR1
RTR0
CR0
1252
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor