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| MC9S12GRMV1 Datasheet, PDF (311/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet | |||
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Chapter 8
S12S Debug Module (S12SDBGV2)
Table 8-1. Revision History
Revision Number
02.08
02.09
02.10
Revision
Date
09.MAY.2008
29.MAY.2008
27.SEP.2012
Sections
Affected
General
8.4.5.4
General
Summary of Changes
Spelling corrections. Revision history format changed.
Added note for end aligned, PurePC, rollover case.
Changed cross reference formats
8.1 Introduction
The S12SDBG module provides an on-chip trace buffer with ï¬exible triggering capability to allow
non-intrusive debug of application software. The S12SDBG module is optimized for S12SCPU
debugging.
Typically the S12SDBG module is used in conjunction with the S12SBDM module, whereby the user
conï¬gures the S12SDBG module for a debugging session over the BDM interface. Once conï¬gured the
S12SDBG module is armed and the device leaves BDM returning control to the user program, which is
then monitored by the S12SDBG module. Alternatively the S12SDBG module can be conï¬gured over a
serial interface using SWI routines.
8.1.1 Glossary Of Terms
COF: Change Of Flow. Change in the program ï¬ow due to a conditional branch, indexed jump or interrupt
BDM: Background Debug Mode
S12SBDM: Background Debug Module
DUG: Device User Guide, describing the features of the device into which the DBG is integrated
WORD: 16-bit data entity
Data Line: 20-bit data entity
CPU: S12SCPU module
DBG: S12SDBG module
POR: Power On Reset
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
313
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