MC9S12GRMV1 Datasheet, PDF (198/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Table 2-21. Block Register Map (G3) (continued)
Global Address
Register Name
Bit 7
6
0x000E–0x001B R
Non-PIM
W
Address Range
5
4
3
2
Non-PIM Address Range
1
Bit 0
0x001C
ECLKCTL
R
NECLK
W
NCLKX2
DIV16
EDIV4
EDIV3
EDIV2
EDIV1
EDIV0
0x001D
R
0
0
0
0
0
0
0
0
Reserved
W
0x001E
IRQCR
0x001F
Reserved
R
0
0
0
0
0
0
IRQE
IRQEN
W
R
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
W
0x0020–0x023F R
Non-PIM
W
Address Range
Non-PIM Address Range
0x0240
PTT
R
0
W
0
PTT5
PTT4
PTT3
PTT2
PTT1
PTT0
0x0241
PTIT
R
0
W
0
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
0x0242
DDRT
R
0
W
0
DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
0x0243
R
0
0
0
0
0
0
0
0
Reserved
W
0x0244
PERT
R
0
W
0
PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
0x0245
PPST
R
0
W
0
PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
0x0246
R
0
0
0
0
0
0
0
0
Reserved
W
0x0247
R
0
0
0
0
0
0
0
0
Reserved
W
0x0248
PTS
R
PTS7
W
PTS6
PTS5
PTS4
PTS3
PTS2
PTS1
PTS0
= Unimplemented or Reserved
MC9S12G Family Reference Manual, Rev.1.23
200
Freescale Semiconductor