MC9S12GRMV1 Datasheet, PDF (242/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
2.4.3.58 Port AD Pull Enable Register (PER1AD)
Address 0x0279
7
R
PER1AD7
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
PER1AD6 PER1AD5 PER1AD4 PER1AD3 PER1AD2
0
0
0
0
0
Figure 2-57. Port AD Pullup Enable Register (PER1AD)
Access: User read/write¹
1
0
PER1AD1 PER1AD0
0
0
Table 2-84. PER1AD Register Field Descriptions
Field
Description
7-0 Port AD pull enable—Enable pull device on input pin
PER1AD This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
2.4.3.59 Port AD Polarity Select Register (PPS0AD)
Address 0x027A (G1, G2)
7
R
PPS0AD7
W
Reset
0
Address 0x027A (G3)
6
PPS0AD6
0
5
PPS0AD5
0
4
PPS0AD4
0
3
PPS0AD3
0
2
PPS0AD2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
PPS0AD3 PPS0AD2
0
0
0
0
0
Figure 2-58. Port AD Polarity Select Register (PPS0AD)
Access: User read/write¹
1
0
PPS0AD1 PPS0AD0
0
0
Access: User read/write¹
1
0
PPS0AD1 PPS0AD0
0
0
MC9S12G Family Reference Manual, Rev.1.23
244
Freescale Semiconductor