MC9S12GRMV1 Datasheet, PDF (637/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

19.3 Memory Map and Register Definition
Pulse-Width Modulator (S12PWM8B8CV2)
19.3.1 Module Memory Map
This section describes the content of the registers in the scalable PWM module. The base address of the
scalable PWM module is determined at the MCU level when the MCU is defined. The register decode map
is fixed and begins at the first address of the module address offset. The figure below shows the registers
associated with the scalable PWM and their relative offset from the base address. The register detail
description follows the order they appear in the register map.
Reserved bits within a register will always read as 0 and the write will be unimplemented. Unimplemented
functions are indicated by shading the bit.
NOTE
Register Address = Base Address + Address Offset, where the Base Address
is defined at the MCU level and the Address Offset is defined at the module
level.
19.3.2 Register Descriptions
This section describes in detail all the registers and register bits in the scalable PWM module.
Register
Name
Bit 7
0x0000 R
PWME¹
PWME7
W
6
PWME6
5
PWME5
4
PWME4
3
PWME3
2
PWME2
1
PWME1
Bit 0
PWME0
0x0001 R
PWMPOL¹ _W ^PPOL7
PPOL6
PPOL5
PPOL4
PPOL3
PPOL2
PPOL1
PPOL0
0x0002 R
PWMCLK¹ _W ^PCLK7
PCLKL6
PCLK5
PCLK4
PCLK3
PCLK2
PCLK1
PCLK0
0x0003 R
0
0
PWMPRCLK _W
PCKB2
PCKB1
PCKB0
PCKA2
PCKA1
PCKA0
0x0004 R
PWMCAE¹ _W
CAE7
CAE6
CAE5
CAE4
CAE3
CAE2
CAE1
CAE0
0x0005 R
0
0
PWMCTL¹ _W ^CON67
CON45
CON23
CON01
PSWAI
PFRZ
0x0006 R
PWMCLKAB¹ _W ^{PCLKAB7 PCLKAB6 PCLKAB5 PCLKAB4 PCLKAB3 PCLKAB2 PCLKAB1 PCLKAB0}
= Unimplemented or Reserved
Figure 19-2. The scalable PWM Register Summary (Sheet 1 of 4)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
639