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| MC9S12GRMV1 Datasheet, PDF (1184/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet | |||
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240 KByte Flash Module (S12FTMRG240K2V1)
NOTE
Vector addresses and their relative interrupt priority are determined at the
MCU level.
31.4.7.1 Description of Flash Interrupt Operation
The Flash module uses the CCIF ï¬ag in combination with the CCIE interrupt enable bit to generate the
Flash command interrupt request. The Flash module uses the DFDIF and SFDIF ï¬ags in combination with
the DFDIE and SFDIE interrupt enable bits to generate the Flash error interrupt request. For a detailed
description of the register bits involved, refer to Section 31.3.2.5, âFlash Configuration Register
(FCNFG)â, Section 31.3.2.6, âFlash Error Configuration Register (FERCNFG)â, Section 31.3.2.7, âFlash
Status Register (FSTAT)â, and Section 31.3.2.8, âFlash Error Status Register (FERSTAT)â.
The logic used for generating the Flash module interrupts is shown in Figure 31-27.
CCIE
CCIF
Flash Command Interrupt Request
DFDIE
DFDIF
SFDIE
SFDIF
Flash Error Interrupt Request
Figure 31-27. Flash Module Interrupts Implementation
31.4.8 Wait Mode
The Flash module is not affected if the MCU enters wait mode. The Flash module can recover the MCU
from wait via the CCIF interrupt (see Section 31.4.7, âInterruptsâ).
31.4.9 Stop Mode
If a Flash command is active (CCIF = 0) when the MCU requests stop mode, the current Flash operation
will be completed before the MCU is allowed to enter stop mode.
1186
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
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