|
MC9S12GRMV1 Datasheet, PDF (635/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet | |||
|
◁ |
Chapter 19
Pulse-Width Modulator (S12PWM8B8CV2)
19.1 Introduction
The Version 2 of S12 PWM module is a channel scalable and optimized implementation of S12
PWM8B8C Version 1. The channel is scalable in pairs from PWM0 to PWM7 and the available channel
number is 2, 4, 6 and 8. The shutdown feature has been removed and the ï¬exibility to select one of four
clock sources per channel has improved. If the corresponding channels exist and shutdown feature is not
used, the Version 2 is fully software compatible to Version 1.
19.1.1 Features
The scalable PWM block includes these distinctive features:
⢠Up to eight independent PWM channels, scalable in pairs (PWM0 to PWM7)
⢠Available channel number could be 2, 4, 6, 8 (refer to device speciï¬cation for exact number)
⢠Programmable period and duty cycle for each channel
⢠Dedicated counter for each PWM channel
⢠Programmable PWM enable/disable for each channel
⢠Software selection of PWM duty pulse polarity for each channel
⢠Period and duty cycle are double buffered. Change takes effect when the end of the effective period
is reached (PWM counter reaches zero) or when the channel is disabled.
⢠Programmable center or left aligned outputs on individual channels
⢠Up to eight 8-bit channel or four 16-bit channel PWM resolution
⢠Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies
⢠Programmable clock select logic
19.1.2 Modes of Operation
There is a software programmable option for low power consumption in wait mode that disables the input
clock to the prescaler.
In freeze mode there is a software programmable option to disable the input clock to the prescaler. This is
useful for emulation.
Wait:
The prescaler keeps on running, unless PSWAI in PWMCTL is set to 1.
Freeze:
The prescaler keeps on running, unless PFRZ in PWMCTL is set to 1.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
637
|
▷ |