MC9S12GRMV1 Datasheet, PDF (204/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
1 _{Read: Anytime. The data source is depending on the data direction value.}
Write: Anytime
Field
7-0
PB
Table 2-23. PORTB Register Field Descriptions
Description
Port B general-purpose input/output data—Data Register
The associated pin can be used as general-purpose I/O. In general-purpose output mode the port data register bit
value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port data register bit, otherwise the
buffered pin input state is read.
2.4.3.3 Port A Data Direction Register (DDRA)
Address 0x0002 (G1)
7
R
DDRA7
W
6
DDRA6
Reset
0
0
Address 0x0002 (G2, G3)
5
DDRA5
0
4
DDRA4
0
3
DDRA3
0
2
DDRA2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
0
0
0
0
0
0
0
Figure 2-4. Port A Data Direction Register (DDRA)
Access: User read/write¹
1
0
DDRA1
DDRA0
0
0
Access: User read only
1
0
0
0
0
0
Table 2-24. DDRA Register Field Descriptions
Field
7-0
DDRA
Description
Port A Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
MC9S12G Family Reference Manual, Rev.1.23
206
Freescale Semiconductor