MC9S12GRMV1 Datasheet, PDF (399/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

S12 Clock, Reset and Power Management Unit (S12CPMU)
NOTE
Since the IRC1M frequency is not a linear function of the temperature, but
more like a parabola, the above relative variation is only an indication and
should be considered with care.
Be aware that the output frequency vary with TC trimming. A frequency
trimming correction is therefore necessary. The values provided in
Table 10-23 are typical values at ambient temperature which can vary from
device to device.
10.3.2.19 S12CPMU Oscillator Register (CPMUOSC)
This registers configures the external oscillator (XOSCLCP).
0x02FA
7
6
5
4
3
2
1
0
R
OSCE
OSCPINS_E
Reserved
N
Reserved]
W
Reset
0
0
0
0
0
0
0
0
Figure 10-27. S12CPMU Oscillator Register (CPMUOSC)
Read: Anytime
Write: Anytime if PROT=0 (CPMUPROT register) and PLLSEL=1 (CPMUCLKS register). Else write has
no effect.
NOTE.
Write to this register clears the LOCK and UPOSC status bits.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
401