MC9S12GRMV1 Datasheet, PDF (370/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

S12 Clock, Reset and Power Management Unit (S12CPMU)
Addres
s
Name
Bit 7
R
0x02F3 CPMUACLKTR
ACLKTR5
W
R
0x02F4 CPMUAPIRH
APIR15
W
R
0x02F5 CPMUAPIRL
APIR7
W
0x02F6
RESERVEDCP
MUTEST3
R
W
0
R
0
0x02F7 RESERVED
W
0x02F8
CPMU
IRCTRIMH
R
W
0x02F9
CPMU
IRCTRIML
R
W
R
0x02FA CPMUOSC
OSCE
W
R
0
0x02FB CPMUPROT
W
0x02FC
RESERVEDCP
MUTEST2
R
W
0
6
5
4
3
2
ACLKTR4 ACLKTR3 ACLKTR2 ACLKTR1 ACLKTR0
APIR14 APIR13 APIR12 APIR11 APIR10
APIR6
0
APIR5
0
APIR4
0
APIR3
0
APIR2
0
0
0
0
0
0
0
TCTRIM[4:0]
OSCPINS_
Reserved
EN
IRCTRIM[7:0]
0
0
0
0
Reserved
0
0
0
0
0
0
1
Bit 0
0
0
APIR9
APIR8
APIR1
0
APIR0
0
0
0
IRCTRIM[9:8]
0
PROT
0
0
= Unimplemented or Reserved
Figure 10-3. CPMU Register Summary
MC9S12G Family Reference Manual, Rev.1.23
372
Freescale Semiconductor