MC9S12GRMV1 Datasheet, PDF (175/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

2.3.9
PM3
PM2
PM1
PM0
Port Integration Module (S12GPIMV1)
Pins PM3-0
Table 2-13. Port M Pins PM3-0
• 64/100 LQFP: The SCI2 TXD signal is mapped to this pin when used with the SCI function. If the SCI2
TXD signal is enabled the I/O state will depend on the SCI2 configuration.
• Signal priority:
64/100 LQFP: TXD2 > GPO
• 64/100 LQFP: The SCI2 RXD signal is mapped to this pin when used with the SCI function. If the SCI2
RXD signal is enabled the I/O state will be forced to be input.
• Signal priority:
64/100 LQFP: RXD2 > GPO
• Except 20 TSSOP: The TXCAN signal is mapped to this pin when used with the CAN function. The
enabled CAN forces the I/O state to be an output.
• 32 LQFP: The SCI1 TXD signal is mapped to this pin when used with the SCI function. If the SCI1 TXD
signal is enabled the I/O state will depend on the SCI1 configuration.
• 48 LQFP: The SCI2 TXD signal is mapped to this pin when used with the SCI function. If the SCI2 TXD
signal is enabled the I/O state will depend on the SCI2 configuration.
• Signal priority:
32 LQFP: TXCAN > TXD1 > GPO
48 LQFP: TXCAN > TXD2 > GPO
64/100 LQFP: TXCAN > GPO
• Except 20 TSSOP: The RXCAN signal is mapped to this pin when used with the CAN function. The
enabled CAN forces the I/O state to be an input. If CAN is active the selection of a pulldown device on
the RXCAN input has no effect.
• 32 LQFP: The SCI1 RXD signal is mapped to this pin when used with the SCI function. The enabled
SCI1 RXD signal forces the I/O state to an input.
• 48 LQFP: The SCI2 RXD signal is mapped to this pin when used with the SCI function. The enabled
SCI2 RXD signal forces the I/O state to an input.
• Signal priority:
32 LQFP: RXCAN > RXD1 > GPO
48 LQFP: RXCAN > RXD2 > GPO
64/100 LQFP: RXCAN > GPO
2.3.10 Pins PP7-0
Table 2-14. Port P Pins PP7-0
PP7-PP6
PP5-PP4
• 64/100 LQFP: The PWM channels 7 and 6 signal are mapped to these pins when used with the PWM
function. The enabled PWM channel forces the I/O state to be an output.
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
64/100 LQFP: PWM > GPO
• 48/64/100 LQFP: The PWM channels 5 and 4 signal are mapped to these pins when used with the
PWM function. The enabled PWM channel forces the I/O state to be an output.
• 48/64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
48/64/100 LQFP: PWM > GPO
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
177