MC9S12GRMV1 Datasheet, PDF (193/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Global Address
Register Name
Table 2-20. Block Register Map (G2) (continued)
Bit 7
6
5
4
3
2
1
Bit 0
0x000E–0x001B R
Non-PIM
W
Address Range
0x001C
ECLKCTL
R
NECLK
W
NCLKX2
0x001D
R
0
0
Reserved
W
Non-PIM Address Range
DIV16
EDIV4
EDIV3
EDIV2
0
0
0
0
EDIV1
0
EDIV0
0
0x001E
IRQCR
0x001F
Reserved
0x0020–0x023F
Non-PIM
Address Range
0x0240
PTT
0x0241
PTIT
0x0242
DDRT
0x0243
Reserved
0x0244
PERT
0x0245
PPST
0x0246
Reserved
0x0247
Reserved
0x0248
PTS
R
0
0
0
0
0
0
IRQE
IRQEN
W
R
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
W
R
W
Non-PIM Address Range
R
PTT7
W
PTT6
PTT5
PTT4
R PTIT7
W
PTIT6
PTIT5
PTIT4
R
DDRT7
W
DDRT6
DDRT5
DDRT4
R
0
0
0
0
W
R
PERT7
W
PERT6
PERT5
PERT4
R
PPST7
W
PPST6
PPST5
PPST4
R
0
0
0
0
W
R
0
0
0
0
W
R
PTS7
W
PTS6
PTS5
PTS4
= Unimplemented or Reserved
PTT3
PTIT3
DDRT3
0
PERT3
PPST3
0
0
PTS3
PTT2
PTIT2
DDRT2
0
PERT2
PPST2
0
0
PTS2
PTT1
PTIT1
DDRT1
0
PERT1
PPST1
0
0
PTS1
PTT0
PTIT0
DDRT0
0
PERT0
PPST0
0
0
PTS0
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
195