MC9S12GRMV1 Datasheet, PDF (197/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Global Address
Register Name
0x027B
PPS1AD
Table 2-20. Block Register Map (G2) (continued)
Bit 7
6
5
4
3
2
1
Bit 0
R
PPS1AD7 PPS1AD6 PPS1AD5 PPS1AD4 PPS1AD3 PPS1AD2 PPS1AD1 PPS1AD0
W
0x027C
PIE0AD
R
PIE0AD7 PIE0AD6 PIE0AD5 PIE0AD4 PIE0AD3 PIE0AD2 PIE0AD1 PIE0AD0
W
0x027D
PIE1AD
R
PIE1AD7 PIE1AD6 PIE1AD5 PIE1AD4 PIE1AD3 PIE1AD2 PIE1AD1 PIE1AD0
W
0x027E
PIF0AD
R
PIF0AD7 PIF0AD6 PIF0AD5 PIF0AD4 PIF0AD3 PIF0AD2 PIF0AD1 PIF0AD0
W
0x027F
PIF1AD
R
PIF1AD7 PIF1AD6 PIF1AD5 PIF1AD4 PIF1AD3 PIF1AD2 PIF1AD1 PIF1AD0
W
= Unimplemented or Reserved
2.4.2.3 Block Register Map (G3)
Table 2-21. Block Register Map (G3)
Global Address
Register Name
Bit 7
6
5
4
3
2
0x0000–0x0007 R
0
0
0
0
0
0
Reserved
W
0x0008
R
0
0
0
0
0
0
PORTE
W
0x0009
R
0
0
0
0
0
0
DDRE
W
0x000A–0x000B R
Non-PIM
W
Address Range
Non-PIM Address Range
0x000C
R
0
0
0
0
PUCR
W
BKPUE
PDPEE
0x000D
R
0
0
0
0
0
0
Reserved
W
= Unimplemented or Reserved
1
Bit 0
0
0
PE1
PE0
DDRE1 DDRE0
0
0
0
0
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
199