MC9S12GRMV1 Datasheet, PDF (188/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Table 2-19. Block Register Map (G1) (continued)
Global Address
Register Name
Bit 7
6
0x000A–0x000B R
Non-PIM
W
Address Range
5
4
3
2
Non-PIM Address Range
1
Bit 0
0x000C
PUCR
R
0
0
BKPUE
PDPEE PUPDE PUPCE PUPBE PUPAE
W
0x000D
R
0
0
0
0
0
0
0
0
Reserved
W
0x000E–0x001B R
Non-PIM
W
Address Range
Non-PIM Address Range
0x001C
ECLKCTL
R
NECLK
W
NCLKX2
DIV16
EDIV4
EDIV3
EDIV2
EDIV1
EDIV0
0x001D
R
0
0
0
0
0
0
0
0
Reserved
W
0x001E
R
0
0
0
0
0
0
IRQCR
IRQE
W
IRQEN
0x001F
Reserved
R
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
W
0x0020–0x023F R
Non-PIM
W
Address Range
Non-PIM Address Range
0x0240
PTT
R
PTT7
W
PTT6
PTT5
PTT4
PTT3
PTT2
PTT1
PTT0
0x0241
PTIT
R PTIT7
W
PTIT6
PTIT5
PTIT4
PTIT3
PTIT2
PTIT1
PTIT0
0x0242
DDRT
R
DDRT7
W
DDRT6
DDRT5
DDRT4
DDRT3
DDRT2
DDRT1
DDRT0
0x0243
R
0
0
0
0
0
0
0
0
Reserved
W
0x0244
PERT
R
PERT7
W
PERT6
PERT5
PERT4
PERT3
PERT2
PERT1
PERT0
0x0245
PPST
R
PPST7
W
PPST6 PPST5 PPST4
= Unimplemented or Reserved
PPST3
PPST2
PPST1
PPST0
MC9S12G Family Reference Manual, Rev.1.23
190
Freescale Semiconductor