MC9S12GRMV1 Datasheet, PDF (1014/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

96 KByte Flash Module (S12FTMRG96K1V1)
28.4.6 Flash Command Description
This section provides details of all available Flash commands launched by a command write sequence. The
ACCERR bit in the FSTAT register will be set during the command write sequence if any of the following
illegal steps are performed, causing the command not to be processed by the Memory Controller:
• Starting any command write sequence that programs or erases Flash memory before initializing the
FCLKDIV register
• Writing an invalid command as part of the command write sequence
• For additional possible errors, refer to the error handling table provided for each command
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data if both flags SFDIF and DFDIF are set. If the SFDIF or DFDIF flags were not
previously set when the invalid read operation occurred, both the SFDIF and DFDIF flags will be set.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see Section 28.3.2.7).
CAUTION
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
28.4.6.1 Erase Verify All Blocks Command
The Erase Verify All Blocks command will verify that all P-Flash and EEPROM blocks have been erased.
Table 28-31. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
000
FCCOB Parameters
0x01
Not required
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed. If all blocks are not erased, it means blank check failed, both MGSTAT bits will
be set.
Table 28-32. Erase Verify All Blocks Command Error Handling
Register
Error Bit
Error Condition
ACCERR Set if CCOBIX[2:0] != 000 at command launch
FPVIOL None
FSTAT
MGSTAT1 Set if any errors have been encountered during the read¹or if blank check failed .
MGSTAT0
Set if any non-correctable errors have been encountered during the read¹ or if
blank check failed.
1 _{As found in the memory map for FTMRG96K1.}
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MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor