MC9S12GRMV1 Datasheet, PDF (214/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Field
7-0
PTIT
Table 2-36. PTIT Register Field Descriptions
Description
Port T input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
2.4.3.17 Port T Data Direction Register (DDRT)
Address 0x0242 (G1, G2)
7
R
DDRT7
W
Reset
0
Address 0x0242 (G3)
6
DDRT6
0
5
DDRT5
0
4
DDRT4
0
3
DDRT3
0
2
DDRT2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
DDRT5
DDRT4
DDRT3
DDRT2
0
0
0
0
0
Figure 2-18. Port T Data Direction Register (DDRT)
Table 2-37. DDRT Register Field Descriptions
Field
7-0
DDRT
Description
Port T data direction—
This bit determines whether the pin is a general-purpose input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Access: User read/write¹
1
0
DDRT1
DDRT0
0
0
Access: User read/write¹
1
0
DDRT1
DDRT0
0
0
MC9S12G Family Reference Manual, Rev.1.23
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Freescale Semiconductor