MC9S12GRMV1 Datasheet, PDF (715/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Data A Received
Receive Shift Register
Data A
Serial Peripheral Interface (S12SPIV5)
Data B Received
Data C Received
SPIF Serviced
Data B
Data C
SPIF
SPI Data Register
Data A
Data B
Data C
= Unspecified
= Reception in progress
Figure 21-9. Reception with SPIF serviced in Time
Data A Received
Receive Shift Register
SPIF
Data A
Data B Received
Data C Received
Data B Lost
SPIF Serviced
Data B
Data C
SPI Data Register
Data A
Data C
= Unspecified
= Reception in progress
Figure 21-10. Reception with SPIF serviced too late
21.4 Functional Description
The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or SPI operation can be interrupt driven.
The SPI system is enabled by setting the SPI enable (SPE) bit in SPI control register 1. While SPE is set,
the four associated SPI port pins are dedicated to the SPI function as:
• Slave select (SS)
• Serial clock (SCK)
• Master out/slave in (MOSI)
• Master in/slave out (MISO)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
717