MC9S12GRMV1 Datasheet, PDF (215/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

2.4.3.18 Port T Pull Device Enable Register (PERT)
Port Integration Module (S12GPIMV1)
Address 0x0244 (G1, G2)
7
R
PERT7
W
Reset
0
Address 0x0244 (G3)
6
PERT6
0
5
PERT5
0
4
PERT4
0
3
PERT3
0
2
PERT2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
PERT5
PERT4
PERT3
PERT2
0
0
0
0
0
Figure 2-19. Port T Pull Device Enable Register (PERT)
Access: User read/write¹
1
0
PERT1
PERT0
0
0
Access: User read/write¹
1
0
PERT1
PERT0
0
0
Table 2-38. PERT Register Field Descriptions
Field
7-2
PERT
Description
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1
PERT
1 Pull device enabled
0 Pull device disabled
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If this pin is used as IRQ only a pullup device can be enabled.
0
PERT
1 Pull device enabled
0 Pull device disabled
Port T pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. The polarity is selected by the related
polarity select register bit. If this pin is used as XIRQ only a pullup device can be enabled.
1 Pull device enabled
0 Pull device disabled
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
217