MC9S12GRMV1 Datasheet, PDF (241/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Table 2-82. AN Routing Options
PRR1AN
0
1
Associated Pins
AN10 - PAD10
AN11 - PAD11
AN13 - PAD13
AN14 - PAD14
AN15 - PAD15
AN10 - PC0
AN11 - PC1
AN13 - PC2
AN14 - PC3
AN15 - PC4
Port Integration Module (S12GPIMV1)
2.4.3.57 Port AD Pull Enable Register (PER0AD)
Address 0x0278 (G1, G2)
7
R
PER0AD7
W
Reset
0
Address 0x0278 (G3)
6
PER0AD6
0
5
PER0AD5
0
4
PER0AD4
0
3
PER0AD3
0
2
PER0AD2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
0
0
PER0AD3 PER0AD2
0
0
0
0
0
Figure 2-56. Port AD Pullup Enable Register (PER0AD)
Access: User read/write¹
1
0
PER0AD1 PER0AD0
0
0
Access: User read/write¹
1
0
PER0AD1 PER0AD0
0
0
Table 2-83. PER0AD Register Field Descriptions
Field
Description
7-0 Port AD pull enable—Enable pull device on input pin
PER0AD This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
243