I82371MX Datasheet, PDF (78/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

82371MX (MPIIX)
E
Bit
Description
6
Special Mask Mode (SMM): If ESMM=1 and SMM=1, the interrupt controller enters Special
Mask Mode. If ESMM=1 and SMM=0, the interrupt controller is in normal mask mode. When
ESMM=0, SMM has no effect.
5
Enable Special Mask Mode (ESMM): 1=Enable SMM bit; 0=Disable SMM bit.
4:3
OCW3 Select: Must be programmed to 01 selecting OCW3.
2
Poll Mode Command: 0=Disable Poll Mode Command. When bit 2=1, the next I/O read to the
interrupt controller is treated as an interrupt acknowledge cycle indicating highest priority request.
1:0
Register Read Command: Bits [1:0] provide control for reading the In-Service Register (ISR)
and the Interrupt Request Register (IRR). When bit 1=0, bit 0 doesl not affect the register read
selection. When bit 1=1, bit 0 selects the register status returned following an OCW3 read. If bit
0=0, the IRR will be read. If bit 0=1, the ISR will be read. Following ICW initialization, the default
OCW3 port address read will be "read IRR". To retain the current selection (read ISR or read
IRR), always write a 0 to bit 1 when programming this register. The selected register can be read
repeatedly without reprogramming OCW3. To select a new status register, OCW3 must be
reprogrammed prior to attempting the read.
Bit[1:0]
00
01
10
11
Function
No Action
No Action
Read IRQ Register
Read IS Register
3.3.3.9. ELCR1—Edge/Level Triggered Register
Register Location:
Default Value:
Attribute:
INT CNTRL-1—4D0h
00h
Read/Write
ELCR1 register allows IRQ3 - IRQ7 to be edge or level programmable on an interrupt by interrupt basis. IRQ0,
IRQ1 and IRQ2 are not programmable and are always edge sensitive.
Bit
Description
7
IRQ7 ECL: 0 = edge triggered mode; 1 = level sensitive mode.
6
IRQ6 ECL: 0 = edge triggered mode; 1 = level sensitive mode.
5
IRQ5 ECL: 0 = edge triggered mode; 1 = level sensitive mode.
4
IRQ4 ECL: 0 = edge triggered mode; 1 = level sensitive mode.
3
IRQ3 ECL: 0 = edge triggered mode; 1 = level sensitive mode.
2:0
Reserved: Must be 0.
78
PRELIMINARY