I82371MX Datasheet, PDF (7/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

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82371MX (MPIIX)
4.8.1.2. SMI Request Status................................................................................................................106
4.8.1.3. SMI# Signal Generation .........................................................................................................108
4.8.1.4. SMI SOURCES ......................................................................................................................108
4.8.2. CPU POWER MANAGEMENT (CPU, DRAM, L2 CACHE, DATAPATH) ................................ 110
4.8.2.1. Stop Clock............................................................................................................................... 110
4.8.2.2. Software Control of STPCLK# ............................................................................................... 112
4.8.2.3. Emulating Clock Division (Clock Throttling) .........................................................................112
4.8.2.4. STPCLK Control State Machine ............................................................................................ 113
4.8.2.5. Auto Clock Throttle (ACT) Feature .......................................................................................114
4.8.3. LOCAL STANDBY (PERIPHERAL MANAGEMENT) .................................................................117
4.8.3.1. Local Standby Sequence .......................................................................................................117
4.8.3.2. Access Ranges .......................................................................................................................118
4.8.3.3. Idle Timers .............................................................................................................................. 118
4.8.3.4. Access Traps .......................................................................................................................... 119
4.8.3.5. SMOUT Programmable Outputs ........................................................................................... 119
4.8.4. SUSPEND .....................................................................................................................................119
4.8.4.1. Suspend mode selects ...........................................................................................................120
4.8.4.2. Suspend SMI# Requests (SRBTN# and BATLOW#) .......................................................... 120
4.8.4.3. Suspend Status (SUSTAT#) Signal and Register ................................................................ 121
4.8.4.4. POWER PLANE CONTROL ..................................................................................................122
4.8.4.5. SHADOW REGISTERS .........................................................................................................123
4.8.5. SUMMARY OF TIMER RANGES ................................................................................................ 123
4.9. Reset Support .......................................................................................................................................124
5.0. PINOUT AND PACKAGE INFORMATION..........................................................................................125
5.1. Pinout Information.................................................................................................................................125
5.2. Package Information............................................................................................................................. 129
6.0. TESTABILITY......................................................................................................................................130
PRELIMINARY
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