I82371MX Datasheet, PDF (41/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

E
82371MX (MPIIX)
3.2.24. PCSC—PROGRAMMABLE CHIP SELECT CONTROL REGISTER
Address Offset:
Default Value:
Attribute:
92–93h
0000h
Read/Write
This register defines a 16-bit I/O address range to be forwarded to the Extended I/O Bus and, if enabled (via the
PARE register), the generation of the PCS# signal. Note that the PAMA Register selects an address range of 1,
2, 4, 8, or 16 bytes (split range is precluded).
Bit
Description
15:0
PCS Address (PCSADDR). PCI addresses AD[15:0] are compared against bits [15:2].
AD[31:16] must be 0s for the address to be decoded.
3.2.25. PAC[5:1]—PROGRAMMABLE ADDRESS CONTROL REGISTER
Address Offset:
Default Value:
Attribute:
94–95hPAC1 A0–A1hPAC4
96–97hPAC2 A2–A3hPAC5
98–99hPAC3
0000h
Read/Write
This register provides a 16-bit I/O address range to be forwarded to the Extended I/O Bus, if enabled via the
PARE Register. Note that the PAM[A,B,C] Register selects an address range of 1, 2, 4, 8, or 16 bytes (split
range is precluded).
Bit
Description
15:0
Programmable Address Control (PADDRC). PCI addresses AD[15:0] are compared against
bits [15:2]. AD[31:16] must be 0s for the address to be decoded.
3.2.26. PAMA—PROGRAMMABLE ADDRESS MASK A REGISTER
Address Offset:
Default Value:
Attribute:
9Ah
00h
Read/Write
This register selects an address range of 1, 2, 4, 8, or 16 bytes (split range is precluded) for the Programmable
Address Control 1 Register (PAC1) and the PCSC Register. The bits in this register are used to mask address
bits AD[3:0], respectively during I/O decode.
Bit
Description
7:4
Programmable Address Control 1 Mask (PAC1MASK). 1=corresponding address bit is not
used in the address decode. 0=Corresponding address bit is used in the address decode. For
example, mask field=0011 selects a 4-byte range.
3:0
Programmable Chip Select Mask (PCSMASK). 1=corresponding address bit is not used in
the address decode. 0=Corresponding address bit is used in the address decode. For example,
mask field=0011 selects a 4-byte range.
PRELIMINARY
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