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I82371MX Datasheet, PDF (117/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)
E
82371MX (MPIIX)
Normal ON
STPCLK# = 1
I/O R e a d fro m
AP MC P ort
AND
STOP GRANT or STOP CLOCK
E n ab led
1ms Delay
Com pleted
STPBRK Event
STOP GR ANT State
STPCLK# = 0
(HCLK Running)
CPU Startup State
STPCLK# = 0
(M PIIX Starts H C LK)
S top G rant Bus Cycle
AND
STOP CLO CK Enabled
STOP CLO CK State
STPCLK# = 0
(HC LK Stopped
by M P IIX)
STPBRK Event
Figure 17. Stop Clock State Diagram
052517
4.8.3. LOCAL STANDBY (PERIPHERAL MANAGEMENT)
The system management places peripherals in a low power state when they have been inactive for long periods
of time. The MPIIX Local Standby hardware enables the system to identify idle devices (Idle Timers, SMI#
generation, Idle Status), put them into a low power “standby” state (SMOUTs, Leakage Control), and trap
accesses to powered-down peripherals (Trap Ranges, Synchronous SMI# Generation, Trap Status). MPIIX
provides resources to manage 6 local devices, IDE, Audio, COM port, and 3 user programmable.
4.8.3.1. Local Standby Sequence
Setup: The system’s power management setup initializes the Local Trap Access I/O address ranges and the
Idle Timer counter for each peripheral device. Then the setup sets the global SMI enable for the Local Standby
Idle Timers and the global SMI enable for the Local Trap Access. (The global SM_FREEZE bit that enables all
timers must be cleared to allow idle timers to count down.)
On-to-Off Transition: When power management software enables the idle timer for that device, the Idle Timer
begins to count down. Any access to a peripheral device’s I/O address reloads that device’s Idle Timer. When
the Idle timer expires, the Local Standby SMI Request status bits are set and SMI# is generated. (Both the
global local standby request status and the specific local standby request status for that device are set.) The
software places the peripheral device into a low power state, disables the Idle Timer hardware, and enables the
Local Trap hardware.
PRELIMINARY
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