I82371MX Datasheet, PDF (123/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

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82371MX (MPIIX)
2. The voltage on the RSMRST# (MPIIX VDDR Resume Well) and MTSC VDDR Resume Well power supplies
are at 5V in normal mode. However, they can drop to a 3.3V level during Suspend to DRAM. (During
Suspend-to-DRAM, the 5V supply might be turned off if 3.3V DRAM is used. )
3. The voltage on the RSMRST# and MPIIX VDDR Resume Well power supplies are normally at 5V. However,
they can drop to the voltage level of the Real-Time Clock power supply during Suspend-to-DISK.
4.8.4.5. SHADOW REGISTERS
MPIIX includes a set of shadow registers for the standard AT write-only registers. In the transition to Suspend
mode, the contents of these registers are saved so the system state can be restored, when resumed. The
shadowed registers can be read back through the SHDW Register.
The SHDW Register contains a counter that points to a shadow register. The counter is initialized upon writing to
the SHDW Register. When the SHDW Register is read, it returns the data from the shadow register pointed by
the counter. The counter increments the count every time the software reads the register.
4.8.5. SUMMARY OF TIMER RANGES
Timer
Table 15. Timer Resolutions and Maximum Counts
Count
Resolution
Maximum
STPCLKHT
255
34 us
8 ms
STPCLKLT
255
34 us
8 ms
CLK_START_DLY
4
500 us
2 ms
LSTBY_TMR_xxx
255
8s
34 min
GSTBY_TMR
255
8s
34 min
SWEXT_SMI_DLY_TMR
255
1 ms
255 ms
SUSP_SMI_DLY_TMR
255
128 ms
32s
PRELIMINARY
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