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I82371MX Datasheet, PDF (23/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX) | |||
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E
82371MX (MPIIX)
Configuration
Offset
00â01h
02â03h
04â05h
06â07h
08h
09â0Bh
0Câ0Dh
0Eh
0Fâ48h
49h
4Aâ4Bh
4Ch
4Dh
4Eh
4Fh
50â5Fh
60â61h
62â69h
6Aâ6Bh
6Câ6Dh
6Eâ6Fh
70h
71â75h
76â78h
79â7Dh
7Eh
7Fh
80h
81â87h
88h
89h
8Aâ8Dh
8Eâ8Fh
90h
91h
92â93h
94â95h
96â97h
98â99h
9Ah
9Bh
Table 1. PCI Configuration Registers
Mnemonic
Register
VID
DID
COM
DS
RID
CLASSC

HEDT

SPPE

ECRT

BIOSE
FDCE

PIRQRC[A,B]

MSTAT
IDETIM

MIRQRC

MDMARC

AUDIOE
DMADS
PCIDMAE

PCIDMAA
PCIDMAB
PMAC[1:0]
PMAM[1:0]
PARE

PCSC
PAC1
PAC2
PAC3
PAMA
PAMB
Vendor Identification
Device Identification
Command
Device Status
Revision Identification
Class Code
Reserved
Header Type
Reserved
Serial and Parallel Port Enable
Reserved
Extended I/O Controller Recovery Timer
Reserved
BIOS Enable
FDC Enable
Reserved
PIRQ[A,B]# Route Control
Reserved
Miscellaneous Status
IDE Timing Modes
Reserved
Motherboard IRQ Route Control
Reserved
Motherboard DMA Route Control
Reserved
Audio Enable
DMA CH[7:5] Address Size
PCI DMA Enable
Reserved
PCI DMA and PCI DMA Expansion A
PCI DMA and PCI DMA Expansion B
Programmable Memory Address Control
Programmable Memory Address Mask
Programmable Address Range Enable
Reserved
Programmable Chip Select Control
Programmable Address Control 1
Programmable Address Control 2
Programmable Address Control 3
Programmable Address Mask A
Programmable Address Mask B
PRELIMINARY
Register
Access
RO
RO
R/W
R/WC
RO
RO

RO

R/W

R/W

R/W
R/W

R/W

RO
R/W

R/W

R/W

R/W
R/W
R/W

R/W
R/W
R/W
R/W
R/W

R/W
R/W
R/W
R/W
R/W
R/W
23
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