I82371MX Datasheet, PDF (62/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

82371MX (MPIIX)
E
Register
Counter
16
AT I/O
address
C4
Table 4. DMA 2 Registers
Description
Slave DMA
Channel 5 Base Address Register (low byte).
17
C4
Channel 5 Base Address Register (high byte).
18
C6
Channel 5 Base Word Count Register (low byte).
19
C6
Channel 5 Base Word Count Register (high byte).
1A
C8
Channel 6 Base Address Register (low byte)
1B
C8
Channel 6 Base Address Register (high byte).
1C
CA
Channel 6 Base Word Count Register (low byte).
1D
CA
Channel 6 Base Word Count Register (high byte).
1E
CC
Channel 7 Base Address Register (low byte).
1F
CC
Channel 7 Base Address Register (high byte).
20
CD
Channel 7 Base Word Count Register (low byte).
21
CD
Channel 7 Base Word Count Register (high byte).
22
D0
DMA2 Command Register.
23
D6
Channel 5 Mode Register.
24
D6
Channel 6 Mode Register.
25
D6
Channel 7 Mode Register.
26
DE
DMA2 Mask Register.
NOTE: The Base Address Registers, the Base Word Counter Registers, and Mode Register of DMA channel 4
are not shadowed. However, the Mask bit of DMA channel 4 is still shadowed.
Register
Counter
Table 5. Programmable Interrupt Controller and Other Registers
AT I/O
address
Description
Interrupt Controller
27
20
PIC1 ICW1.
28
21
PIC1 ICW2.
29
21
PIC1 ICW3.
2A
21
PIC1 ICW4
2B
20
PIC1 OCW2.
2C
A0
PIC2 ICW1.
2D
A1
PIC2 ICW2.
2E
A1
PIC2 ICW3.
62
PRELIMINARY