I82371MX Datasheet, PDF (21/133 Pages) Intel Corporation – INTEL 430MX PCISET 82371MX MOBILE PCI I/O IDE XCELERATOR (MPIIX)

E
82371MX (MPIIX)
Signal Name
RTCCLKO
SYSCLK
PWROK
Type
O
5/3V
CMOS
4mA
O
5V
I
5/3V
st
CMOS
CPURST
O
3.3V
TTL
4mA
PCIRST#
O
5V
INIT
RSTDRV
O
3.3V
TTL
4mA
O
5V
TTL
8mA
PCIRST#
Active
Description
REAL TIME CLOCK OUTPUT: Gated RTCCLK to
MTSC for suspend refresh operation.
High
Low
High
High
SYSTEM CLOCK: See Extended I/O Bus Interface
Section.
POWER OK: When asserted, PWROK is an indication
to the MPIIX that power and PCICLK have been stable
for at least 1 ms. PWROK can be driven
asynchronously. When PWROK is negated, the MPIIX
asserts CPURST, PCIRST# and RSTDRV. When
PWROK is asserted, the MPIIX negates CPURST,
PCIRST#, and RSTDRV.
CPU RESET: The MPIIX asserts CPURST to reset the
CPU. The MPIIX asserts CPURST during power-up and
when a hard reset sequence is initiated through the RC
Register. CPURST is driven synchronously to the rising
edge of PCICLK. If a hard reset is initiated through the
RC register, the MPIIX resets it's internal registers to the
default state.
PCI RESET: The MPIIX asserts PCIRST# to reset
devices that reside on the PCI Bus. The MPIIX asserts
PCIRST# during power-up and when a hard reset
sequence is initiated through the RC Register. PCIRST#
is driven inactive a minimum of 1ms after PWROK is
driven active. PCIRST# is driven active for a minimum of
1ms when initiated through the RC Register. PCIRST#
is driven asynchronously relative to PCICLK.
INITIALIZATION: The MPIIX asserts INIT if it detects a
shut down special cycle on the PCI Bus or if a soft reset
is initiated via the RC Register (0CF9h).
RESET DRIVE: The MPIIX asserts this signal during a
hard reset and during power-up to reset Extended I/O
Bus devices. RSTDRV is also asserted for a minimum
of 1 ms if a hard reset has been programmed in the RC
Register.
2.9. Test Signals
Signal Name
Type
TESTIN#
I
3.3V
PCIRST#
Description
TEST INPUT: The Test signal is used to tri-state all of
the MPIIX outputs.This input is sampled on the assertion
of PWROK.
PRELIMINARY
21